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alt6702 help4 tm umts pcs (band 2) lte/wcdma/cdma multi-mode pam data sheet - rev 2.5 m45 package 10 pin 3 mm x 3 mm x 1 mm surface mount module figure 1: block diagram features ? mixed-mode hspa, evdo, lte compliant ? 4th generation help tm technology ? high effciency (r99 waveform): ? 39 % @ p out = +28.6 dbm ? 35 % @ p out = +17.5 dbm ? 23 % @ p out = +13.5 dbm ? 26 % @ p out = +9 dbm ? 13 % @ p out = +3.5 dbm ? low quiescent current: 2 ma ? low leakage current in shutdown mode: <5 a ? internal voltage regulator ? integrated daisy chainable directional coupler with cpl in and cpl out port ? internal dc blocks on rf in/out ports ? optimized for a 50 ? system ? 1.8 v control logic ? rohs compliant package, 260 o c msl-3 applications ? band 2 wcdma/hspa wireless devices ? band 2 lte wireless devices ? band class 1 and 14 cdma/evdo wireless devices ? band 25 lte devices product description the alt6702 help4 tm pa is a 4th generation help tm product for lte and wcdma devices operating in umts pcs (band 2) and for cdma devices operating in band class 1 and band class 14. this pa incorporates anadigics help4 tm technology to deliver exceptional effciency at low power levels and low quiescent current without the need for external voltage regulators or converters. the device is manufactured using advanced ingap- plus tm hbt technology offering state-of-the-art reliability, temperature stability, and ruggedness. three selectable bias modes that optimize effciency for different output power levels and a shutdown mode with low leakage current increase handset talk and standby time. a daisy chainable directional coupler is integrated in the module, thus eliminating the need of an external coupler. the self-contained 3 mm x 3 mm x 1 mm surface mount package incorporates matching networks optimized for output power, effciency, and linearity in a 50 ? system. al t6702 1 2 3 4 5 10 9 8 7 6 v bat t rf in v mode 2 v mode 1 v en cp l ou t gn d cp l in rf ou t v cc bias contro l voltage regulatio n cp l gnd at slug (pad ) 03/2012
2 figure 2: pinout (x-ray top view) table 1: pin description pin name description 1 v batt battery voltage 2 rf in rf input 3 v mode2 mode control voltage 2 4 v mode1 mode control voltage 1 5 v en pa enable voltage 6 cpl out coupler output 7 gnd ground 8 cpl in coupler input 9 rf out rf output 10 v cc supply voltage v bat t rf in v mode 2 v mode 1 v en 1 2 3 4 56 7 8 9 10 cp l ou t gn d cp l in rf ou t v cc 1 2 3 4 56 7 8 9 10 gn d data sheet - rev 2.5 03/2012 alt6702
3 electrical characteristics table 2: absolute minimum and maximum ratings stresses in excess of the absolute ratings may cause permanent damage. functional operation is not implied under these conditions. exposure to absolute ratings for extended periods of time may adversely affect reliability. table 3: operating ranges the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defned in the electrical specifcations. notes: (1) for operation at 3.1 v, p out is derated by 0.8 db. (2) lte waveform: up to 20 mhz, 18 rbs, qpsk. (3) for operation at +105 c, p out is derated by 1.0 db. parameter min max unit supply voltage (v cc ) 0 +5 v battery voltage (v batt ) 0 +6 v control voltages (v mode1 , v mode2 , v en ) 0 +3.5 v rf input power (p in ) - +10 dbm storage temperature (t stg ) -40 +150 c pa ra me te r mi n ty p ma x unit co mments op er at in g fr eque nc y (f )1 850 -1 91 5m hz su pply vo lt age (v cc )+ 3. 1+ 3. 4+ 4. 35 vp ou t < +2 8. 6 db m en able vo lt age (v en ) +1 .3 5 0 +1 .8 - +3 .1 +0 .5 v pa "o n" pa "s hut dow n" mo de co nt ro l vo lt age (v mo de 1 ,v mo de 2 ) +1 .3 5 0 +1 .8 - +3 .1 +0 .5 v low bi as m ode hi gh bi as m ode wc dm a / um ts ou tp ut po we r r9 9, hp m hs pa (mp r= 0) , hp m lt e (2 ) r9 9, mp m lt e & hs pa (mp r= 0) , mp m (2 ) r9 9, lp m lt e & hs pa (mp r= 0) , lp m (2 ) 27. 8 26. 8 26. 6 - - - - 28. 6 27. 6 27. 4 17 .5 16 .5 9. 0 8. 0 - - - - - - db m 3g pp ts 34 .1 21 -1 , re l 8 t abl e c. 11 .1 .3 fo r wc dm a, su bt est 1 ts 36. 101 re l 8 fo r lt e cdm a ou tp ut po we r hp m mp m lp m 27. 2 - - 28. 0 16 .5 8. 0 - - - db mc dm a2 000, rc -1 ca se te mp er at ur e (t c )- 40 -+ 90 c (1 , 3) (1 , 3) data sheet - rev 2.5 03/2012 alt6702
4 table 4: electrical specifcations - lte operation = 10 mhz qpsk 12 rb (start = 0) (t c = +25 c, v batt = v cc = +3.4 v, v enable = +1.8 v, 50 ? system) notes: 1. aclr and effciency are measured at 1880 mhz. pa ra me te r mi n ty p ma x unit co mme nt s p ou t v mo de 1 v mo de 2 ga in 25 16 8 27. 5 19 10 .5 30 22 13 db p ou t = +2 7. 4 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ac lr e- ut ra at 10 mh z o ffs et - - - -3 9 -3 9 -4 0 -3 4 -3 4 -3 4 db c p ou t = +2 7. 4 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ac lr ut ra at 7. 5 mh z o ffs et - - - -3 9 -4 0 -4 0 -3 6 -3 6 -3 6 db c p ou t = +2 7. 4 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ac lr ut ra at 12 .5 mh z o ffs et - - - -5 9 -5 9 -6 0 -4 0 -4 0 -4 0 db c p ou t = +2 7. 4 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v po we r-a dded e ffi ci en cy 31 26 19 34 30 23 - - - % p ou t = +2 7. 4 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ou ie sce nt cu rre nt (i cq ) low bi as m ode -2 3. 5m at hr ou gh v cc pi n1 .8 v1 .8 v m ode co nt ro l cu rre nt -0 .0 80 .1 5m at hr ou gh v mo de pi ns , v mo de 1, 2 = +1 .8 v en able cu rre nt -0 .0 40 .1 ma th ro ug h v en pi n , v en = +1 .8 v ba tt cu rre nt -0 .8 1. 5m at hr ou gh v ba tt pi n, v mo de 1, 2 = +1 .8 v leakage cu rre nt -< 58 a v ba tt = v cc = +4 .3 5 v v en = 0 v, v mo de 1, 2 = 0 v no is e po we r - - - -1 35 -1 35 -1 46 -1 33 - - db m/ hz 1930 mh z to 1990 mh z gp s ba nd is m ba nd ha rm on ic s 2f o 3f o, 4f o - - -4 4 -5 0 -3 5 -4 2 db cp ou t +2 7. 4 db m co up li ng fact or -2 0- db dir ec ti vi ty -2 0- db co up le r in _o ut da is y ch ai n in se rt io n loss -< 0. 25 -d b 698 mh z to 2620 mh z pi n 8 to 9, s hut down mo de sp ur io us ou tp ut leve l (a ll sp ur io us ou tp ut s) -- <- 70 db c p ou t < + 27. 4 db m in -b an d lo ad vswr < 5: 1 ou t- of -b an d lo ad vswr < 10 :1 ap pl ie s ov er al l oper at in g ra ng es load mi sm at ch st re ss wi th no per ma ne nt d egr adat io n or fa il ur e 8: 1- -v sw ra ppli es ov er fu ll oper at in g ra ng e data sheet - rev 2.5 03/2012 alt6702
5 table 5: electrical specifcations - wcdma operation (r99 waveform) (t c = +25 c, v cc = +3.4 v, v batt = +3.4 v, v en = +1.8 v, 50 ? system) parameter min typ max unit comments p out v mode1 v mode2 gain 25 16 8 27.5 19 10.5 30 22 13 db p out= +28.6 dbm p out= +17.5 dbm p out= +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr1 at 5 mhz offset - - - -41 -43 -43 -37.5 -37.5 -37.5 dbc p out= +28.6 dbm p out= +17.5 dbm p out= +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr2 at 10 mhz offset - - - -54 -55 -59 -48 -48 -48 dbc p out= +28.6 dbm p out= +17.5 dbm p out= +9 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added efficiency 35 31 - 22 - 39 35 23 26 13 - - - - - % p out= +28.6 dbm p out= +17.5 dbm p out= +13.5 dbm p out= +9 dbm p out= +3.5 dbm 0 v 1.8 v 1.8 v 1.8 v 1.8 v 0 v 0 v 0 v 1.8 v 1.8 v spurious output level (all spurious outputs) - - -70 dbc p out < +28.6 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range data sheet - rev 2.5 03/2012 alt6702
6 table 6: electrical specifcations - cdma operation (cdma2000, rc-1) (t c = +25 c, v batt = v cc = +3.4 v, v enable = +1.8 v, 50 ? system) pa ra me te r mi n ty p ma x unit co mme nt s p ou t v mo de 1 v mo de 2 ga in 25 16 8 27.5 19 10 .5 30 22 13 db p ou t = +2 8 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ad ja ce nt ch a nne l po we r at 1 .2 5 mh z of fs et pr im ar y ch a nne l bw = 1. 23 mh z ad ja ce nt ch a nne l bw = 30 kh z - - - -5 0 -5 6 -5 7 -4 6. 5 -4 6. 5 -4 6. 5 db c p ou t = +2 8 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v ad ja ce nt ch a nne l po we r at 1. 98 mh z offset pr im ar y ch a nne l bw = 1. 23 mh z ad ja ce nt ch a nne l bw = 30 kh z - - - -5 6 <- 60 <- 60 -5 3 -5 3 -5 3 db c p ou t = +2 8 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v po we r-a dded ef fi ci en cy 33 27 18 37 31 22 - - - % p ou t = +2 8 db m p ou t = +1 6. 5 db m p ou t = +8 db m 0 v 1. 8 v 1. 8 v 0 v 0 v 1. 8 v sp ur io us ou tp ut lev el (a ll sp ur io us ou tp ut s) -- -7 0d bc p ou t < + 28 db m, in -b an d vswr <5 :1 , ou t-of- ba nd vsw r <1 0: 1 a ppl ie s to al l oper at in g co nd it io ns load mi sm at ch st re ss wi th no per ma ne nt d egr adat io n or fa il ur e 8: 1- -v sw ra ppl ie s ov er fu ll oper at in g ra ng e data sheet - rev 2.5 03/2012 alt6702
7 performance data plots: (lte operation at 1880 mhz and 50 v system) 0 5 10 15 20 25 30 0 5 10 15 20 25 30 gain (db) pout (dbm) figure 4: lte gain (db) over temperature (vbatt=vcc=3.4v) - 30c 3.4vcc 25c 3.4vcc 90c 3.4vcc figure 3: lte gain (db) over temperature (v batt = v cc = +3.4 v) figure 4: lte gain (db) over voltage (t c = 25 8c) 0 5 10 15 20 25 30 0 5 10 15 20 25 30 gain (db) pout (dbm) figure 5: lte gain (db) over voltage (tc=25c ) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 efficiency (%) pout (dbm) figure 6: lte pae (%) over temperature (vbatt=vcc=3.4v) - 30 3.4cc 25c 3.4vcc 90c 3.4vcc figure 5: lte pae (%) over temperature (v batt = v cc = +3.4 v) 0 5 10 15 20 25 30 35 40 45 0 5 10 15 20 25 30 efficiency (%) pout (dbm) figure 7: lte pae (%) over voltage (tc=25c) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc figure 6: lte pae (%) over voltage (t c = 25 8c) figure 7: lte aclr1 (dbc) over temperature (v batt = v cc = +3.4 v) - 55 - 50 - 45 - 40 - 35 - 30 - 25 - 20 0 5 10 15 20 25 30 aclr1 (5mhz dbc) pout (dbm) figure 8: lte acrl1 (dbc) over temperature (vbatt=vcc=3.4v) - 30c 3.4vcc 25c 3.4vcc 90c 3.4vcc figure 8: lte aclr1 (dbc) over voltage (t c = 25 8c) - 60 - 55 - 50 - 45 - 40 - 35 - 30 - 25 - 20 0 5 10 15 20 25 30 aclr1 (5mhz dbc) pout (dbm) figure 9: lte aclr1 (dbc) over voltage (tc=25c) 25c 3.2vcc 25c 3.4vcc 25c 4.2vcc data sheet - rev 2.5 03/2012 alt6702
8 application information to ensure proper performance, refer to all related application notes on the anadigics web site: http://www.anadigics.com shutdown mode the power amplifer may be placed in a shutdown mode by applying logic low levels (see operating ranges table) to the v en , v mode1 and v mode2 voltages. bias modes the power amplifer may be placed in either low, medium or high bias modes by applying the appropriate logic level (see operating ranges table) table 7: bias control to the v mode pins. the bias control table below lists the recommended modes of operation for various applications. three operating modes are recommended to optimize current consumption. high bias/high power operating mode is for p out levels > 16 dbm. at ~17dbm - 8 dbm, the pa could be switched to medium power mode. for p out levels < ~9 dbm, the pa could be switched to low power mode for extremely low current consumption. figure 9: evaluation board schematic c3 33pf c4 2.2f ceramic rf in 1 6 7 10 8 5 4 3 v batt v mode1 rf out rf in gnd v cc v en cpl out v cc c1 0.1f v batt v mode 1 v en cpl in v mode 2 29 v mode2 c5 2.2 f c2 0.1f gnd at slug cpl in cpl out rf out c3 33pf c4 2.2f ceramic rf in 1 6 7 10 8 5 4 3 v batt v mode1 rf out rf in gnd v cc v en cpl out v cc c1 0.1f v batt v mode 1 v en cpl in v mode 2 29 v mode2 c5 2.2 f c2 0.1f gnd at slug cpl in cpl out rf out application p out levels bias mode v en v mode1 v mode2 v cc v b at t low power (low bias mode) < +9 dbm low +1.8 v +1.8 v +1.8 v 3.1 - 4.35 v > 3.1 v med power (medium bias mode) > 8 dbm < +17 dbm low +1.8 v +1.8 v 0 v 3.1 - 4.35 v > 3.1 v high power (high bias mode) > +16 dbm high +1.8 v 0 v 0 v 3.1 - 4.35 v > 3.1 v shutdown - shutdown 0 v 0 v 0 v 3.1 - 4.35 v > 3.1 v data sheet - rev 2.5 03/2012 alt6702
9 figure 10: m45 package outline - 10 pin 3 mm x 3 mm x 1 mm surface mount module figure 11: branding specifcation - m45 package package outline 6702r llllnn pin 1 identifier co untr y co de(c c) pa rt number l ot number date co de y y= y ear ww= wo rk w eek yy wwc c data sheet - rev 2.5 03/2012 alt6702
10 pcb and stencil design guideline figure 12: recommended pcb layout information data sheet - rev 2.5 03/2012 alt6702
11 component packaging figure 13: carrier tape pin 1 figure 14: reel data sheet - rev 2.5 03/2012 alt6702
12 ordering information or der nu mb er te mp er at ure ra ng e pa ckag e descri pt ion co mp on ent pa ckagin g al t 6702r m4 5q 7- 40 o c to + 90 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 1 mm su rf ace mo unt mo du le t ape an d re el , 2500 pi eces per re el al t 6702r m4 5p 9- 40 o c to + 90 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 1 mm su rf ace mo unt mo du le pa rt ia l t ape an d re el warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. import ant notice anadigics 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifcations contained in advanced product information sheets and preliminary data sheets are subject to change prior to a products formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. data sheet - rev 2.5 03/2012 alt6702

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